- Reverse Engineering the TI USB Graph Silver Link
- 11 Mar 2021 02:04:54 am
- Last edited by queueRAM on 13 Mar 2021 09:18:14 pm; edited 1 time in total
There are two hardware revisions of the TI USB Graph Silver Link cable: "A" and "B" as denoted by the last character of its production code. Most graph link cables contain a production code of the following format: F-MMYYH with the following decoding:
From sometime in the early 2000s through March 2003, the "A" version was manufactured using a Cypress CY7C64013 chipset. Starting around April 2003 through 2010, the "B" hardware version using the TI TUSB3410 was manufactured in various factories. Around 2006, the B hardware revision code was dropped from the production code.
Edit: updated factory list thanks to information from womp below :)
I studied the PCB layouts and captured almost complete schematics for both the "A" and "B" SilverLink boards. The only pieces missing are the capacitor values as these are not labeled and I have no means to measure them. There is always a possibility of schematic error due to inner layers of the PCB.
Silver Link "A": Cypress CY7C64013
The "A" hardware uses the Cypress CY7C64013C chipset which is a 5V Full-speed USB controller containing a 12MHz custom "M8" 8-bit CPU, 256 bytes RAM, and 8KB PROM (sometimes listed as EEPROM). I have so far been unable to dump the PROM data from inside the chip. The documentation references using the Hi-Lo System-Cypress USB Programmer (CY3649) along with an adapter base board (CY3083-SC28), but I have yet to come across documentation on the programming sequence for this model for use with 3rd-party programmers. The only thing I've been able to deduce is that Vpp should be tied to 12V during the programming sequence. In the pursuit of knowledge, I have sacrificed an "A" SilverLink to move the CY7C64013C to a breakout board for further probing. If anyone has more details on the programming and verification sequence of this chipset, please let me know.
"A" Schematic
Silver Link "B": TI TUSB3410
The "B" hardware uses the TI TUSB3410 chipset which is a 3.3V USB 2.0 Full-Speed controller containing an integrated 24MHz 8052 microcontroller, 256 bytes of Data RAM, 2KB shared RAM, 10KB of ROM, and 16KB of Code RAM for loading firmware from an externally attached EEPROM. The EEPROM is attached via an I2C bus and the ROM code contains a bootloader to read the header from the EEPROM and automatically load and start running the firmware. This makes it easy to dump the firmware by simply observing the I2C accesses off the EEPROM pins upon powering it up.
"B" Schematic
The KiCad schematics and the "B" revision 8052 firmware disassembly are included in a repository for preservation. Perhaps it is useful for recovering SilverLink whose EEPROMs have failed over their lifetime or for people wanting to design their own clones. To understand it better, I am working on decompiling the "B" micro-controller firmware. I'll post updates here if I uncover anything. https://github.com/queueRAM/ti_graph_link
- F - Factory: I (Inventec, Taiwan), S (Inventec, Shanghai, China), N (Nam Tai, China), P (Inventec, Pudong, China)
- MM - Month of manufacture
- YY - Year of manufacture
- H - Hardware revision: either A or B or absent (see description below)
From sometime in the early 2000s through March 2003, the "A" version was manufactured using a Cypress CY7C64013 chipset. Starting around April 2003 through 2010, the "B" hardware version using the TI TUSB3410 was manufactured in various factories. Around 2006, the B hardware revision code was dropped from the production code.
Edit: updated factory list thanks to information from womp below :)
I studied the PCB layouts and captured almost complete schematics for both the "A" and "B" SilverLink boards. The only pieces missing are the capacitor values as these are not labeled and I have no means to measure them. There is always a possibility of schematic error due to inner layers of the PCB.
Silver Link "A": Cypress CY7C64013
The "A" hardware uses the Cypress CY7C64013C chipset which is a 5V Full-speed USB controller containing a 12MHz custom "M8" 8-bit CPU, 256 bytes RAM, and 8KB PROM (sometimes listed as EEPROM). I have so far been unable to dump the PROM data from inside the chip. The documentation references using the Hi-Lo System-Cypress USB Programmer (CY3649) along with an adapter base board (CY3083-SC28), but I have yet to come across documentation on the programming sequence for this model for use with 3rd-party programmers. The only thing I've been able to deduce is that Vpp should be tied to 12V during the programming sequence. In the pursuit of knowledge, I have sacrificed an "A" SilverLink to move the CY7C64013C to a breakout board for further probing. If anyone has more details on the programming and verification sequence of this chipset, please let me know.
"A" Schematic
Silver Link "B": TI TUSB3410
The "B" hardware uses the TI TUSB3410 chipset which is a 3.3V USB 2.0 Full-Speed controller containing an integrated 24MHz 8052 microcontroller, 256 bytes of Data RAM, 2KB shared RAM, 10KB of ROM, and 16KB of Code RAM for loading firmware from an externally attached EEPROM. The EEPROM is attached via an I2C bus and the ROM code contains a bootloader to read the header from the EEPROM and automatically load and start running the firmware. This makes it easy to dump the firmware by simply observing the I2C accesses off the EEPROM pins upon powering it up.
"B" Schematic
The KiCad schematics and the "B" revision 8052 firmware disassembly are included in a repository for preservation. Perhaps it is useful for recovering SilverLink whose EEPROMs have failed over their lifetime or for people wanting to design their own clones. To understand it better, I am working on decompiling the "B" micro-controller firmware. I'll post updates here if I uncover anything. https://github.com/queueRAM/ti_graph_link